ELET 1530 - Digital Principles Academic Division: Business, Industry and Technology Academic Discipline: Engineering Technology (01231) Assistant Dean: Vincent Palombo PhD 4 Credit(s) A study of the binary number system, Boolean algebra, Logic and Logic circuits, flip flops, registers, counters, and their interconnection in small systems. This curriculum has been previously approved under the Ohio Board of Regents Career Technical Credit Transfer guide (CTAG) and the Transfer Agreement Guide (TAG) as CTEET002 and OET002 respectively. No changes have been made to the outcomes based on these requirements. OET002 and CTEET002 2 Lab Hour(s) 3 Lecture Hour(s); College Wide Outcomes | College-Wide Learning Outcomes |
Assessments - - How it is met & When it is met |
| Communication – Written |
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| Communication – Speech |
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| Intercultural Knowledge and Competence |
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| Critical Thinking |
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| Information Literacy |
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| Quantitative Literacy |
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Student Learning Outcomes for Course
| Outcomes |
Assessments – How it is met & When it is met |
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1. Demonstrate the ability to convert to and from binary, hex, octal, and BCD, and convert to and from 8-bit binary- decimal.
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Lab – First half of term
Quiz – First half of term
Homework – First half of term
Final exam
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2. Demonstrate the ability to develop a combinational logic circuit composed of NOT, AND, OR, NAND, NOR gates given a boolean equation, truth table, or statement.
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Lab – First half of term
Quiz – First half of term
Homework – First half of term
Final exam
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3. Design, verify and/or simplify logic circuits using the rules of Boolean algebra and Demorgan’s Theorem.
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Lab – First half of term
Quiz – First half of term
Homework – First half of term
Final exam
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4. Design, verify and/or simplify combinational logic circuits using the rules of Boolean algebra and Demorgan’s Theorem.
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Lab – First half of term
Quiz – First half of term
Homework – First half of term
Final exam
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5. Explain the operation of a two’s compliment adder/subtractor circuit and a BCD adder circuit.
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Lab – First half of term
Quiz – First half of term
Homework – First half of term
Final exam
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6. Explain the function of an encoder, decoder, multiplexer and demultiplexer.
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Lab – Second half of term
Quiz – Second half of term
Homework – Second half of term
Final exam
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7. Discuss and compare the operation of S-R, gated S-R, D and J-K flip-flops and design circuits using flip-flops.
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Lab – First half of term
Midterm
Homework – First half of term
Final exam
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8. Design ripple counters and frequency dividers using J-K FFs.
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Lab – Second half of term
Quiz – Second half of term
Homework – Second half of term
Final exam
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9. Design serial or parallel-in to serial or parallel-out shift registers using J-K FFs.
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Lab – Second half of term
Quiz – Second half of term
Homework – Second half of term
Final exam
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| 10. Explain the operation of memory and storage circuits |
Lab – Second half of term
Quiz – Second half of term
Homework – Second half of term
Final Exam
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11. Explain characteristic differences in various Integrated circuit technologies.
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Lab – First half of term
Quiz – First half of term
Homework – First half of term
Final exam
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Standard Grading Scale 93-100 A
90 - 92 A-
87- 89 B+
83 - 86 B
80 -82 B-
77- 79 C+
73 - 76 C
70 -72 C-
67- 69 D+
63 - 66 D
60 -62 D-
00- 59 F
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*Inclusive of race, color, religion, gender, gender identity or expression, national origin (ancestry), military status (past, present or future), disability, age (40 years or older), status as a parent during pregnancy and immediately after the birth of a child, status as a parent of a young child, status as a foster parent, genetic information, or sexual orientation, Standard NCSC Course Policies Important information regarding College Procedures and Policies can be found on the syllabus supplement located at this link
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